Dc-to-dc converter

ABSTRACT

A transformer has a primary winding connected across a d.c. power supply via a parallel connection of a switch and a resonant capacitor, and a secondary winding connected across a load via a rectifying and smoothing circuit. In order for the switch to be turned on and off at zero voltage, there is provided, in parallel with the serial circuit of the transformer primary and the switch, a serial circuit of a tertiary and a quaternary winding of the transformer, a resonant inductor, a first diode, and a second switch. A second diode is connected in parallel with the serial connection of the transformer quaternary, resonant inductor, first diode, and second switch. A switch control circuit is connected between the rectifying and smoothing circuit and the first and second switches for on-off control of the latter according to the converter output voltage. The second switch is so controlled in relation to the first switch that the resonant capacitor is compulsorily caused to discharge, making the voltage across the first switch zero when it is turned on.

BACKGROUND OF THE INVENTION

This invention relates to d.c.-to-d.c. converters in general and, inparticular, to a d.c.-to-d.c. converter designed for zero-voltageswitching of a main switch; that is, the main switch of the converter isturned on and off when the voltage across the same is approximately zerofor minimal power loss.

U.S. Pat. No. 5,719,755 to Usui is hereby cited as describing andclaiming a flyback d.c.-to-d.c. converter bearing particular pertinenceto the instant invention. This prior art converter has a transformerwith a primary winding connected across a direct-current power supplyvia an on-off switch, and a secondary winding connected across a loadvia a rectifying and smoothing circuit. A capacitor is connected inparallel with the switch for partial resonance.

The fundamental operating principle of the flyback d.c.-to-d.c.converter is such that the transformer stores energy from the powersupply when the switch is closed, and releases the stored energy forpowering the load when the switch is open. Zero-voltage switching isautomatically accomplished when the switch goes off, because there is novoltage across the switch when it is on. The voltage across thecapacitor rises from zero during each nonconducting period of theswitch.

Difficulties were experienced, however, in zero-voltage turning-on ofthe switch. Should the resonant capacitor have some charge left thereonwhen the switch was turned on, that charge would be released through theswitch, resulting in power loss. It was suggested and practiced tolessen this power loss by causing the capacitor to complete dischargebefore the switch was turned on.

In a typical conventional zero-voltage-switching method, after theenergy that had been stored on the transformer during each conductingperiod of the switch was released during the ensuing nonconductingperiod of the switch, the resonant capacitor was discharged by theresonance of the transformer primary and the capacitor. The switch wasturned on when the voltage across the resonant capacitor, and henceacross the switch, became practically zero. Zero-voltage turning-on ofthe switch was thus accomplished, but under limited conditions.

The above conventional solution proved unsatisfactory in cases where theinput voltage varied much as, say, from 100 to 230 volts. The conductingperiod of the switch grew less with an increase in input voltage underthese conditions. Less energy was stored on the transformer during suchshorter periods of time, and correspondingly less time was required forits discharge. The result was the flow of an oscillatory current throughthe resonance circuit of the capacitor and transformer primary followingthe completion of discharge.

For this reason the charge on the capacitor was not necessarily beenzero when the switch was turned on; in other words, zero-voltageswitching did not take place. The efficiency of the converterdeteriorated in the cases noted above, as well as in the event of agreat reduction in the power requirement of the load.

SUMMARY OF THE INVENTION

The present invention aims, in a d.c.-to-d.c. converter of the kinddefined, at zero-voltage switching of the main switch when the switch isnot only tuned on but off as well, totally independently of how long theswitch is held turned on.

Briefly, the present invention may be summarized as azerovoltage-switching d.c.-to-d.c. converter to be connected between ad.c. power supply and a load, comprising a transformer having a primary,a secondary, a tertiary, and a quaternary winding. The transformerprimary is connected via a first switch to a pair of input terminalswhich are to be coupled to a d.c. power supply, the first switch beingconnected in parallel with a resonant capacitor or like capacitancemeans. The transformer secondary is connected via a rectifying andsmoothing circuit to a pair of output terminals which are to beconnected to a load to be powered. The transformer tertiary andquaternary are connected in series with each other and with resonantinductance means and a first diode and a second switch, and in parallelwith the serial connection of the transformer primary and the firstswitch. A second diode is connected in parallel with the serialconnection of the transformer quaternary and the resonant inductancemeans and the first diode and the second switch. Also included is aswitch control circuit connected to the first and the second switch formaking on-off control of these switches. The switch control circuitincludes means for turning on the second switch at a first moment thatis earlier than the starting moment of each conducting period of thefirst switch and turning off the second switch at a second moment thatis equal to or earlier than the ending moment of each conducting periodof the first switch.

The second switch, newly introduced by the instant invention, serves thepurpose of compulsorily discharging the resonant capacitor and hencemaking zero the voltage across the first switch. Thus is accomplishedthe zero-voltage switching of the first switch when the same is turnedon, in addition to when it is turned off.

The first and second switches are controlled by the common switchcontrol circuit in prescribed time relationship to each other. Despitechanges in the conducting periods of the first switch, the resonantcapacitor is forcibly discharged by the second switch to enablezero-voltage turning-on of the first switch. The switch control circuitrequires addition of a minimal number of parts to the preexisting onesfor controlling the first switch.

The second switch is itself well calculated not to adversely affect theefficiency of the converter. The second switch is turned on at zerocurrent, and off at zero voltage.

The above and other objects, features and advantages of this inventionwill become more apparent, and the invention itself will best beunderstood, from a study of the following description and appendedclaims, with reference had to the attached drawings showing somepreferred embodiments of the invention.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic electrical diagram of the zero-voltage-switchingflyback d.c.-to-d.c. converter embodying the novel concepts of thisinvention;

FIG. 2 is a schematic electrical diagram, partly in block form, of theswitch control circuit of the FIG. 1 d.c.-to-d.c. converter;

FIG. 3, consisting of (A) through (I), is a set of voltage and currentwaveform diagrams useful in explaining the operation of the FIG. 1d.c.-to-d.c. converter;

FIG. 4, consisting of (A) through (D), is a set of voltage waveformdiagrams useful in explaining the operation of the FIG. 2 switch controlcircuit;

FIG. 5 is a schematic electrical diagram, partly in block form, ofanother preferred form of switch control circuit of the FIG. 1d.c.-to-d.c. converter; and

FIG. 6, consisting of (A) through (I), is a set of voltage waveformdiagrams useful in explaining the operation of the FIG. 5 switch controlcircuit.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

The invention is believed to be best embodied in the flybackd.c.-to-d.c. converter of FIG. 1. The converter has a pair of inputterminals 1 a and 1 b, with a direct-current power supply Ei shownconnected therebetween, and a pair of output terminals 2 a and 2 b witha load Ro shown connected therebetween. The power supply Ei could beserve by a rectifying and smoothing circuit. Between the input and theoutput terminal pairs there is connected a transformer T having aprimary winding N₁, a secondary winding N₂, a tertiary winding N₃, and aquaternary winding N₄, all electromagnetically coupled together.

Other primary components of the converter include two switches Q₁ and Q₂both in the form of field-effect transistors, a resonant capacitor C₁,two diodes D₁, and D₂ connected in parallel with the respective switchesQ₁ and Q₂, two additional diodes D₃ and D₄, a rectifying and smoothingcircuit 3 connected between the transformer secondary N₂ and the pair ofoutput terminals 2 a and 2 b, a switch control circuit 4 for on-offcontrol of the switches Q₁ and Q₂ according to the voltage applied tothe load Ro, and a resonant inductor L₁.

The four windings N₁-N₄ of the transformer T, all wound around amagnetic core F, have polarities indicated by the dots in FIG. 1. Itwill therefore be seen that the primary N₁ and the secondary N₂ windingare oppositely polarized, and the tertiary N₃ and quaternary N₄ windingare of the same polarization as the primary winding N₁ with respect tothe voltage of the power supply Ei.

It is also understood that the primary N₁ and the tertiary N₃ windingare equal in turns, and the quaternary winding N₄ less in turns than theprimary and tertiary windings. The turns of these transformer windingsrelate to the voltage applied to the secondary switch Q₂. The followingrelationship exists between the voltages across the switches Q₁ and Q₂and the turns of the transformer windings N₃ and N₄:

Vq ₂ =Vq ₁+(N ₄ /N ₃)Ei

where

Vq₁=voltage across the first switch Q₁

Vq₂=voltage across the second switch Q₂

N₃=turns of the transformer tertiary N₃

N₄=turns of the transformer quaternary N₄.

Consequently, should the transformer quaternary N₄ be equal in turns tothe transformer primary N₁ or tertiary N₃, the voltage applied to thesecond switch Q₂ would be twice as high as that applied to the firstswitch Q₁. The turns of the transformer windings should be so determinedin relation to one another that the resulting voltages can be wellwithstood by the switches. No serious problem will occur in countrieswhere the commercial supply voltage is 100 volts. In 200-volt countries,however, the turns of the transformer quaternary Q₄ should preferably befrom twenty to fifty percent of those of the transformer tertiary Q₃.

The transformer primary N₁ has one extremity thereof connected to thedirect-current supply terminal 1 a, and the other extremity grounded viathe first switch Q₁ and the other direct-current supply terminal 1 b.The resonant capacitor C₁, or snubber capacitor, is shown connected inparallel with the first switch Q₁, and so is the first diode D₁.Intended for the flow of a reverse current, the first diode D₁ is sooriented as to be reverse-biased by the voltage of the power supply Ei.The provision of the capacitor C₁ and the diode D₁ is not an absoluterequirement.

The rectifying and smoothing circuit 3 comprises a rectifying diode Doand a smoothing capacitor Co. The rectifying diode Do is connected toone extremity of the transformer secondary N₂, and the smoothingcapacitor Co is connected in parallel with the transformer secondary viathe rectifying diode. Since the transformer secondary N₂ is opposite inpolarity to the transformer primary N₁, the rectifying diode Do will benonconductive while the supply voltage is being impressed to thetransformer primary N₁. The rectifying diode Do will conduct in responseto the voltage developing across the transformer secondary N₂ due to therelease of the energy from the transformer T when the first switch Q₁goes off. Thereupon the smoothing capacitor Co will be charged, andpower supplied to the load Ro.

The transformer tertiary N₃ and quaternary N₄, the resonant inductor L₁,the third diode D₃, and the second switch Q₂ are all connected in serieswith one another to form an auxiliary resonant circuit. This auxiliaryresonant circuit is in parallel relationship both to the power supply Eiand to the serial circuit of the transformer primary N₁ and first switchQ₁. The third diode D₃ is so oriented as to be forward-biased by thesupply voltage. The second diode D₂ is connected in parallel with thesecond switch Q₂. This second diode could be omitted, however, if itspurposes could be served by the inherent or parasitic diode of theswitch Q₂. Polarized to be reverse-biased by the supply voltage, thefourth diode D₄ is connected in parallel with the auxiliary resonantcircuit of the transformer tertiary N₃ and quaternary N₄, the resonantinductor L₁, the third diode D₃, and the second switch Q₂.

The switch control circuit 4, to be detailed hereinbelow with referenceto FIG. 2, has inputs connected to the pair of converter outputterminals 2 a and 2 b, and outputs connected to the gates of the FETswitches Q₁ and Q₂. The first switch control signal Vg₁ applied from theswitch control circuit 4 to the first switch Q₁ is shown at (A) in FIG.3, and the second switch control signal Vg₂ applied therefrom to thesecond switch Q₂ at (B) in FIG. 3.

With reference to FIG. 2 the switch control circuit 4 has a voltagedetector circuit 11 connected to the pair of converter output terminals2 a and 2 b for putting out a signal indicative of the converter outputvoltage. This detector output signal is applied to one input of adifferential amplifier 12, the other input of which is connected to asource 13 of a reference voltage representative of a target value atwhich the converter output voltage should be maintained. The output V₁from the differential amplifier 12, indicative of a possible departureof the converter output voltage from the target value, is applied to oneinput of a comparator 15, the other input of which is connected to awave generator 14. The wave generator 14 generates a triangular wave ora sawtooth as a periodic wave having a high frequency (e.g. 20-150 kHz).

FIG. 4 shows at (A) both the departure signal V₁ and the triangular wavevoltage Vt of, say, 20-150 kHz delivered from the wave generator 14 tothe comparator 15. The resulting output from the comparator 15 is aseries of duration-modulated pulses indicated at (B) in FIG. 4, whichare impressed as the noted first switch control signal Vg₁, (A) in FIG.3, to the first switch Q₁.

Also connected to the output of the differential amplifier 12 is avoltage divider circuit 16 having two resistors R₁ and R₂ connected inseries between differential amplifier output and ground. The output V₂from the voltage divider circuit 16, with a voltage less than that ofthe departure signal V₁, is delivered to one input of a secondcomparator 17, the other input of which receives the triangular wavevoltage Vt from the wave generator 14. The resulting output from thesecond comparator 17 is another series of duration-modulated pulses seenat (C) in FIG. 4, which are delivered to a monostable multivibrator(MMV) 18. A comparison of (B) and (C) in FIG. 4 will reveal that theoutput pulses of the second comparator 17 are of greater duration thanthose of the first comparator 15.

Triggered by the leading edges of the output pulses from the secondcomparator 17, the MMV 18 will put out the pulses shown at (D) in FIG.4. These MMV output pulses constitute the second switch control signalVg₂, (B) in FIG. 3, each lasting as from a first moment t₀ to a secondmoment t₄. The moment t₄ of decay of each pulse of the second switchcontrol signal Vg₂ may be delayed until t₅ at a maximum. The secondswitch control signal Vg₂ is delivered to the second switch Q₂.

Operation

The operation of the FIGS. 1 and 2 flyback d.c.-to-d.c. converter willbe best understood by separately studying what happens in the before-t₀period, t₀-t₁ period, t-t₂ period, t₂-t₃ period, t₃-t₄ period, t₄-t₅period, t₅-t₆ and t₆-t₇ period of FIG. 3. The following operationaldescription will therefore be divided under the subheadings denotingthese periods.

The pre-t₀ Period

The switches Q₁ and Q₂ are both open during these periods. As the energythat has been stored on the transformer T during the previous conductingperiod of the first switch Q₁ is released, there will build up acrossthe transformer secondary N₂ a voltage that will forward-bias therectifying diode Do. With the consequent conduction of the rectifyingdiode Do as at (G) in FIG. 3, the smoothing capacitor Co will becharged, and the load Ro powered.

The t₀-t₁ Period

It is understood that the second switch Q₂ is turned on at to, and thefirst switch Q₁ at t₁, as at (A) and (B) in FIG. 3. The resonantcapacitor C₁ will be discharged by resonance during this period,resulting in a gradual drop of the voltage Vq₁, (C) in FIG. 3, acrossthe first switch Q₁, to zero. Since the second switch Q₂ is conductivethroughout the t₀-t₁ period, a current will flow both along a first pathcomprising the power supply Ei, transformer tertiary N₃, transformerquaternary N₄, resonant inductor L₁, third diode D₃, and second switchQ₂, and a second path comprising the resonant capacitor C₁, transformerprimary N₁, transformer tertiary N₃, transformer quaternary N₄, resonantinductor L₁, third diode D₃, and second switch Q₂.

With the current flow through the transformer tertiary N₃ and quaternaryN₄ along the second path, there will develop across the transformersecondary N₂ a voltage that will reverse-bias the rectifying diode Doand so render the same nonconductive. The diode current Ido will thusbecome zero as at (G) in FIG. 3. The resonant capacitor C₁ will then bedischarged, causing a drop in the voltage Vq₁ across the first switch Q₁until it becomes zero at t₁, as at (C) in FIG. 3.

As indicated at (F) in FIG. 3, the current Iq₂ through the second switchQ₂ will gradually rise in magnitude from t₀, thanks to the inductor L₁connected in series therewith. Thus has been accomplished thezero-current switching of the second switch Q₂.

The t₁-t₂ Period

The voltage Vq₁ across the first switch Q₁ is practically zero when thefirst switch is turned on at t₁. This zero-voltage switching of thefirst switch Q₁ leads to the reduction of switching loss. During theensuing t₁-t₂ period, owing to the liberation of the energy that hasbeen stored on the resonant inductor L₁ during the t₀-t₁ period, acurrent will flow through the path comprising the resonant inductor L₁,third diode D₃, second switch Q₂, first diode D₁, or first switch Q₁,transformer primary N₁, transformer tertiary N₃, and transformerquaternary N₄. A current will also flow through the path comprising theresonant inductor L₁, third diode D₃, second switch Q₂, power supply Ei,transformer tertiary N₃, and transformer quaternary N₄, as well asthrough the path comprising the resonant inductor L₁, third diode D₃,second switch Q₂, fourth diode D₄, and transformer quaternary N₄.

The current Iq₁ shown at (D) in FIG. 3 represents the sum of the currentthrough the first switch Q₁ and the current through the first diode D₁.The current Iq₁ is therefore negative when the current is flowingthrough the first diode D₁.

With the current flow through the transformer tertiary N₃ and quaternaryN₄ during the t₁-t₂ period, there will develop across the transformersecondary N₂ a voltage that will reverse-bias the rectifying diode Do.No power will then be fed to the load Ro, and energy will be storedinstead on the transformer T, that energy being released from theinductor L₁.

The t₂-t₃ Period

At t₂, when both first diode D₁, and fourth diode D₄ cease to beforward-biased, the current will no longer flow through the pathcomprising the resonant inductor L₁, third diode D₃, second switch Q₂,first diode D₁, transformer primary N₁, transformer tertiary N₃, andtransformer quaternary N₄, and so will the current Idb through the pathcomprising the resonant inductor L₁, third diode D₃, second switch Q₂,fourth diode D₄, and transformer quaternary N₄. The residual energy ofthe resonant inductor L₁ will therefore be released through the pathcomprising the resonant inductor L₁, third diode D₃, second switch Q₂,power supply Ei, transformer tertiary N₃, and transformer quaternary N₄during this t₂-t₃ period.

Since the first switch Q₁ has been on since t₁, the forward current Iq₁of the first switch will flow through the path comprising the powersupply Ei, transformer primary N₁, and first switch Q₁. The rectifyingdiode Do is now nonconductive, so that energy will be stored on theinductive transformer T.

The t₃-t₄ Period

At t₃ the current Iq₂, shown at (F) in FIG. 3, through the second switchQ₂ becomes zero, and at t₄ the second switch is turned off. Although thesecond switch Q₂ is on during this period, the third diode D₃ is heldreverse biased, so that the current Iq₂ will now flow through the secondswitch. Only the current Iq₁ will flow through the path comprising thepower supply Ei, transformer primary N₁, and first switch Q₁, causingthe storage of energy on the transformer T.

The conducting period of the second switch Q₂ should expire at or aftert₃ and at latest t₅. Further the starting moment to of the t₀-t₄conducting period of the second switch Q₂ should be so determined thatthe voltage Vq₁ across the first switch Q₁ may be made approximatelyzero by resonance at the subsequent starting moment t₁, of theconducting period of the first switch. In short the t₀-t₁ period shouldbe sufficiently long for the resonant capacitor C₁ to be substantiallyfully discharged. The length of time required for the voltage Vq₁ acrossthe first switch Q₁ to change from its value at t₀ to that at t₁,depends upon the circuit constant of the resonant circuit. The voltagedivider circuit 16, FIG. 2, of the switch control circuit 4 is designedto determine one of the input levels of the second comparator 17 inorder that the t₀-t₁ period of FIG. 3 may be obtained.

The first switch Q₁ may be turned on at any moment from t₁, when thevoltage Vq₁ across the first switch becomes zero as at (C) in FIG. 3, tot₂ when the first diode D₁, becomes nonconductive. The voltage acrossthe first switch Q₁ is zero during the t₁-t₂ period when the voltageacross the resonant capacitor C₁ is zero and when the first diode D₁ isconductive. The first switch Q₁ can therefore be zero-voltage switchedby the first switch control signal Vg₁, (A) in FIG. 3, during the t₁-t₂period.

At (A) in FIG. 3 is shown the first switch control signal Vg₁ to go highat t₁. In practice the first switch control signal Vg₁ may go highpreferably at a moment approximately midway between t₁ and t₂. However,even if the first switch Q₁ is turned on earlier than t₁, when thevoltage Vq₁ across the same becomes zero, and not earlier than t₀, whenthe voltage Vq₁ starts dwindling, the switching loss will be reduced byan amount proportional to the drop of the first switch voltage Vq₁.

It must also be pointed out that the reduction of switching loss ispossible even if the first switch Q₁ is turned on shortly after t₂. Theresonant capacitor C₁ will start to be charged at t₂ if then the firstswitch Q₁ is left turned off. But even then, if the voltage is lowerthan the voltage Vq₁ across the first switch Q₁ at t₀, switching losswill become correspondingly less.

Speaking broadly, therefore, the first switch Q₁ may be turned on at anymoment that is later than t₀, when the second switch Q₂ is turned on, aslong as the voltage Vq₁ across the first switch Q₁ is less than thatwhen the first switch is off.

As indicated at (B) in FIG. 3, the second switch Q₂ is turned off at t₄which is later than t₃ when the current Iq₂ through the second switchbecomes zero as at (F) in FIG. 3. Zero-current turnoff of the secondswitch Q₂ is thus accomplished for less power loss due to the secondswitch.

The t₄-t₅ Period

During this period, as during the preceding t₃-t₄ period, the currentIq₁ will flow through the path comprising the power supply Ei,transformer primary Ni, and first switch Q₁, causing energy to be storedon the transformer T. The current through the transformer primary N₁,which is inductive, will increase in magnitude with time, as at (D) inFIG. 3. The rectifying diode Do is nonconductive during this period, sothat power will be fed to the load Ro from the smoothing capacitor Co.

The t₅-t₆ Period

This brief period is a period of transition from the conductive to thenonconductive state of the first switch Q₁. The resonant capacitor C₁will start to be charged when the first switch Q₁ is actually turned offin response to the going-low of the first switch control signal Vg₁, (A)in FIG. 3, at t₅. The voltage Vg₁ across the resonant capacitor C₁ andhence across the first switch Q₁ will build up, as at (C) in FIG. 3, instep with the progress of the charging of the capacitor. It is thus seenthat the zero-voltage turning-off of the first switch Q₁ has beenaccomplished. The energy that has been stored on the transformer T willstart to be released in this period, and the diode current Ido willstart flowing as at (G) in FIG. 3.

The t₆-t₇ Period

The t₆-t₇ period of FIG. 3 is akin to the pre-t₀ period set forth above.One cycle of converter operation, which has started at t₀, comes to anend at t₇, and the same cycle repeats itself thereafter.

As will be understood by referring back to FIG. 2, the durations of theoutput pulses Vg₁ and Vg₂, (A) and (B) in FIG. 3, of the two comparators15 and 17 of the switch control circuit 4 are subject to changedepending upon the magnitude of the converter output voltage. Forinstance, upon increase in the converter output voltage above the targetvalue, both the output voltage V₁ of the differential amplifier 12 andthe output voltage V₂ of the voltage divider circuit 16 will becomeproportionately higher.

A study of FIG. 4 will show that, inputting these higher voltages, thecomparators 15 and 17 put out pulses of correspondingly shorterdurations. The shorter-duration output pulses of the first comparator 15will lessen the duty ratio of the first switch Q₁, with the result thatless power will be fed from transformer T to load Ro. It isself-evident, then, how more power is fed to the load Ro in the event ofa drop in the converter output voltage below the target value.

The advantages gained by this particular embodiment of the invention maybe recapitulated as follows:

1. The zero-voltage switching of the first switch Q₁, both when it isturned on and off, and the zero-voltage turning-off and zero-currentturning-on of the second switch Q₂, are accomplished. The results of allthis are less power loss and less heat radiation.

2. The zero-voltage switching of the first switch Q₁ is unhampered evenwhen its conducting periods are very short. This is because the secondswitch Q₂ is turned on shortly before the first switch Q₁ is, therebycausing the resonant capacitor C₁ to discharge. The first switch Q₁ issubsequently turned on at zero voltage, irrespective of the magnitude ofthe charge on the resonant capacitor and of variation in the moment ofcompletion of energy release from the transformer T.

3. For the same reason as set forth in connection with the secondadvantage above, the zero-voltage turning-on of the first switch Q₁ istotally unaffected by variations in the durations of the switch controlpulses Vg₁, due to fluctuations in the supply voltage or in the powerrequirement of the load.

4. The second switch Q₂ is controlled merely by adding, as illustratedin FIG. 2, the voltage divider circuit 16, second comparator 17 and MMV18 to the duration-modulated pulse generator of familiar make comprisingthe wave generator 14 and first comparator 15.

Alternate Embodiment

FIG. 5 shows a modified switch control circuit 4 a for use in the FIG. 1d.c.-to-d.c. converter in substitution for the FIG. 2 switch controlcircuit 4. A comparison of FIGS. 2 and 5 will reveal that the switchcontrol circuits 4 and 4 a are alike in having the comparators 15 and 17and all the means connected to their inputs. The inputs to, and outputsfrom, the comparators 15 and 17 of the modified switch control circuit 4a are as depicted at (A)-(C) in FIG. 6, which are equivalent to (A)-(C)in FIG. 4.

The output stages of the FIG. 5 comparators 15 and 17 differ from thoseof their FIG. 2 counterparts. The output of the first comparator 15 isconnected to both pulse rise detector circuit 21 and pulse decaydetector circuit 22, and the output of the second comparator 17 to bothpulse rise detector circuit 23 and pulse decay detector circuit 24. Thepulse rise detector circuits 21 and 23 are connected to the set inputs Sof RS flip-flops 25 and 26, respectively. The first pulse decay detectorcircuit 22 is connected to the reset input R of the second flip-flop 26,and the second pulse decay detector circuit 24 to the reset input R ofthe first flip-flop 25. The noninverting outputs Q of the flip-flops 25and 26 are connected to the gates of the FET switches Q₁ and Q₂,respectively, of the FIG. 1 d.c.-to-d.c. converter.

The first pulse rise detector circuit 21 puts out a series of triggerpulses P₁, (C) in FIG. 6, in response to the leading edges of the FIG.6(B) output pulses of the first comparator 15. The first pulse decaydetector circuit 23 puts out a series of trigger pulses P₂, FIG. 6(E),in response to the trailing edges of the FIG. 6(B) output pulses of thefirst comparator 15. The second pulse rise detector circuit 23 puts outa series of trigger pulses P₃, FIG. 6(F), in response to the leadingedges of the FIG. 6(C) output pulses of the second comparator 17. Thesecond pulse decay detector circuit 24 responds to the trailing edges ofthe FIG. 6(C) output pulses of the second comparator 17 by producing aseries of trigger pulses P₄, FIG. 6(G).

The first flip-flop 25 will therefore be set, as at t₁ in FIG. 6, byeach output pulse P₁ of the first pulse rise detector circuit 21, andreset, as at t₅, by each output pulse P₄ of the second pulse decaydetector circuit 24. So set and reset, the first flip-flop 25 willprovide the first switch control signal Vg₁, FIG. 6(H), consisting of aseries of pulses each lasting as from t₁ to t₅ in FIG. 6, for deliveryto the first switch Q₁, FIG. 1.

The second flip-flop 26 will be set, as at t₀ in FIG. 6, by each outputpulse P₃ of the second pulse ride detector circuit 23, and reset, as att₄, by each output pulse P₂ of the first pulse decay detector circuit22. The second flip-flop 26 will thus provide the second switch controlsignal Vg₂, FIG. 6(I), consisting of a series of pulses each lasting asfrom t₀ to t₄ in FIG. 6.

As will be understood from a comparison of (H) and (I) in FIG. 6 and (C)and (D) in FIG. 4, the two switch control signals Vg₁ and Vg₂ producedby the FIG. 5 switch control circuit 4 a are equivalent to thoseproduced by the FIG. 2 switch control circuit 4. The switches Q₁ and Q₂of the FIG. 1 d.c.-to-d.c. converter are therefore controllable byeither circuit 4 or 4 a.

An advantage peculiar to the FIG. 5 switch control circuit 4 a is thatthe durations of both first and second series of switch control pulsesVg₁ and Vg₂ are correlated. The durations of the first series of switchcontrol pulses Vg₁ may therefore be determined at will without regard tothe durations of the second series of switch control pulses Vg₂.

Possible Modifications

Notwithstanding the foregoing detailed disclosure it is not desired thatthe present invention be limited by the exact showing of the drawings orby the description thereof. The following, then, is a brief list ofpossible modifications or alterations of the illustrated embodimentswhich are all believed to fall within the purview of the instantinvention:

1. Semiconductor switches other than FETs, such as bipolar transistorsand IGBTs, may be employed as the switches Q₁ and Q₂.

2. The inductor L₁ is per se not a necessity; instead, the transformertertiary N₃ and quaternary N₄ could be loosely coupled to thetransformer primary N₁, for more leakage inductances. The increasedinductance of the transformer tertiary and/or quaternary will then servethe purpose of the inductor L₁.

3. The purposes of the resonant capacitor C₁ could be served byparasitic capacitance between the drain and source of the first FETswitch C₁.

4. The purposes of the first diode D₁ could also be served by theinherent or parasitic diode of the first switch Q₁.

5. Unlike the showing of FIG. 1 the transformer primary N₁, tertiary N₃and quaternary N₄ need not be equal in turns; instead, for instance, theprimary and the tertiary could be equal, and the quaternary differenttherefrom.

6. The voltage detector circuit 11, FIGS. 2 and 5, of the switch controlcircuit 4 or 4 a could be connected directly to the first comparator 15and to the voltage divider circuit 16, instead of via the differentialamplifier 12.

7. The invention could be applied to a forward d.c.-to-d.c. convertersuch that the rectifying diode Do conducts when the first switch Q₁ isclosed.

What is claimed is:
 1. A d.c.-to-d.c. converter to be connected betweena d.c. power supply and a load, comprising: (a) a pair of inputterminals to be connected to a d.c. power supply; (b) a transformerhaving a primary winding, a secondary winding, a tertiary winding, and aquaternary winding which are all electromagnetically coupled together,the primary winding having one extremity thereof connected to one of thepair of input terminals; (c) a pair of output terminals to be connectedto a load; (d) a rectifying and smoothing circuit connected between thesecondary winding of the transformer and the pair of output terminals;(e) a first switch connected between the other extremity of the primarywinding of the transformer and the other of the pair of input terminals;(f) resonant capacitance means connected in parallel with the firstswitch; (g) resonant inductance means; (h) a first diode; (i) a secondswitch, the tertiary winding and quaternary winding of the transformerand the resonant inductance means and the first diode and the secondswitch being all connected in series with one another and in parallelwith the serial connection of the primary winding of the transformer andthe first switch, the first diode being so oriented as to beforward-biased by a supply voltage to be applied from the pair of inputterminals; (j) a second diode connected in parallel with the serialconnection of the quaternary winding of the transformer and the resonantinductance means and the first diode and the second switch, the seconddiode being so oriented as to be reverse-biased by the supply voltage tobe applied from the pair of input terminals; and (k) a switch controlcircuit connected to the first and the second switch for making on-offcontrol of the first and the second switch, the switch control circuitincluding means for turning on the second switch at a first moment thatis earlier than a starting moment of each conducting period of the firstswitch and turning off the second switch at a second moment that isequal to or earlier than an ending moment of each conducting period ofthe first switch.
 2. The d.c.-to-d.c. converter of claim 1 wherein theswitch control circuit comprises: (a) voltage detector means connectedto the rectifying and smoothing circuit for putting out a voltage inproportion to the converter output voltage being applied to the load;(b) a voltage divider circuit connected to the voltage detector meansfor putting out a voltage indicative of a predetermined fraction of theoutput voltage of the voltage detector means; (c) a wave generator forgenerating a periodic wave; (d) a first comparator having inputsconnected to the voltage detector means and the wave generator forputting out a first switch control signal in the form of a series ofpulses indicative of whether the output voltage of the voltage detectormeans is greater or less than the periodic wave, the first comparatorhaving an output connected to the first switch for on-off controlthereof by the first switch control signal; (e) a second comparatorhaving inputs connected to the voltage divider circuit and the wavegenerator for providing a series of output pulses indicative of whetherthe output voltage of the voltage divider circuit is greater or lessthan the periodic wave; and (f) a pulse generator connected to thesecond comparator for putting out a second switch control signal in theform of a series of pulses each rising with one output pulse of thesecond comparator and each decaying equal to or earlier than one outputpulse of the first comparator, the pulse generator having an outputconnected to the second switch for on-off control thereof by the secondswitch control signal.
 3. The d.c.-to-d.c. converter of claim 2 whereinthe pulse generator of the switch control circuit is a monostablemultivibrator.
 4. The d.c.-to-d.c. converter of claim 1 wherein theswitch control circuit comprises: (a) voltage detector means connectedto the rectifying and smoothing circuit for putting out a voltage inproportion to the converter output voltage being applied to the load;(b) a voltage divider circuit connected to the voltage detector meansfor putting out a voltage indicative of a predetermined fraction of theoutput voltage of the voltage detector means; (c) a wave generator forgenerating a periodic wave; (d) a first comparator having inputsconnected to the voltage detector means and the wave generator forputting out a first series of pulses indicative of whether the outputvoltage of the voltage detector means is greater or less than theperiodic wave; (e) a second comparator having inputs connected to thevoltage divider circuit and the wave generator for putting out a secondseries of pulses indicative of whether the output voltage of the voltagedivider circuit is greater or less than the periodic wave; (f) a firstpulse rise detector circuit connected to the first comparator fordetecting the rise of each output pulse thereof; (g) a first pulse decaydetector circuit connected to the first comparator for detecting thedecay of each output pulse thereof; (h) a second pulse rise detectorcircuit connected to the second comparator for detecting the rise ofeach output pulse thereof; (i) a second pulse decay detector circuitconnected to the second comparator for detecting the decay of eachoutput pulse thereof; (j) a first flip-flop connected to the first pulserise detector circuit and the second pulse decay detector circuit inorder to be set in response to the leading edge of each output pulse ofthe first comparator and reset in response to the trailing edge of eachoutput pulse of the second comparator, the first flip-flop putting out afirst switch control signal for on-off control of the first switch; and(k) a second flip-flop connected to the second pulse rise detectorcircuit and the first pulse decay detector circuit in order to be set inresponse to the leading edge of each output pulse of the secondcomparator and reset in response to the trailing edge of each outputpulse of the first comparator, the second flip-flop putting out a secondswitch control signal for on-off control of the second switch.
 5. Thed.c.-to-d.c. converter of claim 1 wherein the rectifying and smoothingcircuit comprises: (a) a rectifying diode connected to one extremity ofthe secondary winding of the transformer and so polarized as to becomeconductive in response to the a voltage building up in the transformersecondary when the first switch is off; and (b) a smoothing capacitorconnected in parallel with the transformer secondary via the rectifyingdiode.
 6. The d.c.-to-d.c. converter of claim 1 wherein the tertiarywinding and quaternary winding of the transformer are of the samepolarity as the primary winding of the transformer with respect to thesupply voltage to be applied from the pair of input terminals.
 7. Thed.c.-to-d.c. converter of claim 1 further comprising a third diodeconnected in parallel with the first switch, the third diode being sooriented as to be reverse-biased by the supply voltage to be appliedfrom the pair of input terminals.